This invention relates, in general, to memory systems, and more particularly, to a memory system having a plurality of memory cells each capable of storing more than two states.
Solid state memories are well-known, and particularly solid state memories using metal oxide semiconductor field effect transistors. There is a continuous effort to make memory systems smaller, faster, and use less power. One way to make a memory smaller is to be able to store more information in each memory cell location. However, one of the problems with such a memory is the ability to distinguish which state is stored in a selected memory cell. Some reference source will be required, but in order to make the memory a competitive product it must remain relatively small in overall size and low in power consumption.
The present invention provides such a memory system. Each memory cell is capable of storing more than two states. The memory cells are arranged in a manner that permits them to be made relatively small in size, which results in fast operation and low power consumption. The invention is described as having memory cells capable of storing four states which provides two binary bits. It will be understood that a memory cell could be built employing the principles of the present invention having memory cells capable of storing more than four different states. The present invention also has a reference voltage generator which consumes a very minimum amount of power and is only energized when data is being read from the memory. The reference voltage generator is built in a manner to conserve silicon chip area and to maximize speed of operation of the memory.